From 3c4be63e9f2afd140884e0f93eb2fb0e7c78cb61 Mon Sep 17 00:00:00 2001 From: q66 Date: Tue, 25 Aug 2020 16:50:24 +0200 Subject: [PATCH] llvm10: add ppc patch to fix issues with newer rust and firefox --- .../patches/llvm/llvm-007-ppc-d85007.patch | 86 +++++++++++++++++++ srcpkgs/llvm10/template | 2 +- 2 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 srcpkgs/llvm10/files/patches/llvm/llvm-007-ppc-d85007.patch diff --git a/srcpkgs/llvm10/files/patches/llvm/llvm-007-ppc-d85007.patch b/srcpkgs/llvm10/files/patches/llvm/llvm-007-ppc-d85007.patch new file mode 100644 index 00000000000..59d8f08003a --- /dev/null +++ b/srcpkgs/llvm10/files/patches/llvm/llvm-007-ppc-d85007.patch @@ -0,0 +1,86 @@ +From cf54ca458afff1f7827bfbbc939429a00496c4f7 Mon Sep 17 00:00:00 2001 +From: Tom Stellard +Date: Tue, 18 Aug 2020 10:54:49 -0700 +Subject: [PATCH] [PowerPC] PPCBoolRetToInt: Skip translation if there is + ConstantExpr + +PPCBoolRetToInt collects PHI, Argument, Call and Constant defs related to an `i1` value which later is translated to an `i32`/`i64` value. The `translate` method expects an `i1` value. However, if the `Constant` is a `ConstantExpr`, the type of the `ConstantExpr` might not be `i1`. + +Fixes https://bugs.llvm.org/show_bug.cgi?id=46923 which causes ICE +``` +llvm-project/llvm/lib/IR/Constants.cpp:1924: static llvm::Constant *llvm::ConstantExpr::getZExt(llvm::Constant *, llvm::Type *, bool): Assertion `C->getType()->getScalarSizeInBits() < Ty->getScalarSizeInBits()&& "SrcTy must be smaller than DestTy for ZExt!"' failed. +``` + +Differential Revision: https://reviews.llvm.org/D85007 +--- + llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp | 8 ++++-- + llvm/test/CodeGen/PowerPC/pr46923.ll | 31 +++++++++++++++++++++ + 2 files changed, 37 insertions(+), 2 deletions(-) + create mode 100644 llvm/test/CodeGen/PowerPC/pr46923.ll + +diff --git a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp +index 2259a29f838..cfe3b3ce2e9 100644 +--- llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp ++++ llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp +@@ -90,6 +90,9 @@ class PPCBoolRetToInt : public FunctionPass { + + // Translate a i1 value to an equivalent i32/i64 value: + Value *translate(Value *V) { ++ assert(V->getType() == Type::getInt1Ty(V->getContext()) && ++ "Expect an i1 value"); ++ + Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext()) + : Type::getInt32Ty(V->getContext()); + +@@ -227,8 +230,9 @@ class PPCBoolRetToInt : public FunctionPass { + // CallInst. Potentially, bitwise operations (AND, OR, XOR, NOT) and sign + // extension could also be handled in the future. + for (Value *V : Defs) +- if (!isa(V) && !isa(V) && +- !isa(V) && !isa(V)) ++ if ((!isa(V) && !isa(V) && !isa(V) && ++ !isa(V)) || ++ isa(V)) + return false; + + for (Value *V : Defs) +diff --git a/llvm/test/CodeGen/PowerPC/pr46923.ll b/llvm/test/CodeGen/PowerPC/pr46923.ll +new file mode 100644 +index 00000000000..d6f65508848 +--- /dev/null ++++ llvm/test/CodeGen/PowerPC/pr46923.ll +@@ -0,0 +1,31 @@ ++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ++; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \ ++; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s ++ ++@bar = external constant i64, align 8 ++ ++define i1 @foo() { ++; CHECK-LABEL: foo: ++; CHECK: # %bb.0: # %entry ++; CHECK-NEXT: crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+lt ++; CHECK-NEXT: li r3, 0 ++; CHECK-NEXT: li r4, 1 ++; CHECK-NEXT: isel r3, r4, r3, 4*cr5+lt ++; CHECK-NEXT: blr ++entry: ++ br label %next ++ ++next: ++ br i1 undef, label %true, label %false ++ ++true: ++ br label %end ++ ++false: ++ br label %end ++ ++end: ++ %a = phi i1 [ icmp ugt (i64 0, i64 ptrtoint (i64* @bar to i64)), %true ], ++ [ icmp ugt (i64 0, i64 2), %false ] ++ ret i1 %a ++} +-- +2.18.1 + diff --git a/srcpkgs/llvm10/template b/srcpkgs/llvm10/template index 62c75d00061..9298c68022d 100644 --- a/srcpkgs/llvm10/template +++ b/srcpkgs/llvm10/template @@ -1,7 +1,7 @@ # Template file for 'llvm10' pkgname=llvm10 version=10.0.0 -revision=4 +revision=5 wrksrc="llvm-${version}.src" build_style=cmake configure_args="