vp-build/srcpkgs/libmad/patches/mips-mode_di.patch

28 lines
708 B
Diff

--- a/fixed.h 2004-02-17 03:02:03.000000000 +0100
+++ b/fixed.h 2017-12-03 21:02:42.248609296 +0100
@@ -299,6 +299,16 @@
# elif defined(FPM_MIPS)
+#if 1
+
+typedef unsigned int u64_di_t __attribute__ ((mode (DI)));
+#define MAD_F_MLX(hi, lo, x, y) \
+ do { \
+ u64_di_t __ll = (u64_di_t) (x) * (y); \
+ hi = __ll >> 32; \
+ lo = __ll; \
+ } while (0)
+#else
/*
* This MIPS version is fast and accurate; the disposition of the least
* significant bit depends on OPT_ACCURACY via mad_f_scale64().
@@ -328,6 +338,7 @@
: "%r" ((x) >> 12), "r" ((y) >> 16))
# define MAD_F_MLZ(hi, lo) ((mad_fixed_t) (lo))
# endif
+#endif
# if defined(OPT_SPEED)
# define mad_f_scale64(hi, lo) \